IMS 2026 ran last week in Boston. The most consistent theme across the floor wasn’t the die — it was the package. Specifically, how much of the engineering that determines whether an RF or microwave system actually performs has moved off the wafer and into the interconnect, the substrate, and the thermal path.
Every year the RF die get faster, wider-band, and more power-dense. And every year more of the engineering that determines whether the system works moves into the package surrounding it. That trend has been building for several years, but the urgency in the IMS conversations — particularly around domestic sourcing and traceable assembly — was sharper than in prior years.
What kept coming up on the floor
Four themes surfaced repeatedly across the packaging-side conversations at IMS 2026:
- Thermal as the bandwidth ceiling. At high power density and millimeter-wave frequencies, the limiting factor is increasingly the die-attach interface and the path to the heatsink. The transistor has headroom the package can’t extract.
- Interconnect parasitics as a circuit design decision. Above a certain frequency, wire-bond inductance is no longer a rounding error. Flip-chip, short-loop wire bond, and substrate routing choices become part of the RF design — not a mechanical back-end detail left to the assembler.
- Hermetic and traceable assembly demand rising. Defense and aerospace RF programs increasingly want packaging done on domestic soil, with a material stack and process history they can trace end to end. That requirement came up from multiple directions across the week.
- Packaging conversations moving earlier in the design loop. More teams at IMS were looking to engage packaging engineers during architecture — before tape-out commits the die geometry — because the package sets hard limits on what the die can deliver in system.
Why the timing theme matters most
The thermal and interconnect constraints are well-understood in principle. What’s changing is when in the design process teams are treating them as real constraints rather than details to be handled later. A team that defers the packaging conversation until after tape-out has already made most of the decisions the package engineer would have influenced: die size, bond-pad placement, thermal budget allocation, substrate selection. Those decisions are expensive to revisit once the die is committed.
The teams that arrived at IMS with the packaging already in the design loop — die-attach material chosen around the thermal budget, interconnect geometry considered at RF layout — were describing fundamentally different build experiences than the ones working backward from a finished die. The early-engagement pattern consistently produced fewer redesigns and more predictable qualification timelines.
The practical signal from Boston
IMS draws the RF and microwave engineering community at high concentration. What surfaces consistently in floor conversations at a show like that tends to be a fair leading indicator of what programs are actually encountering. The signal from IMS 2026 is that the package is firmly in the performance conversation for RF hardware, and the programs treating it otherwise are the ones hitting schedule problems and qualification delays.
The package is no longer where you finish the RF design. It’s where a significant portion of system performance is determined — at the die-attach layer, at the interconnect, and at the seal.
If you were at IMS and are working through the thermal or interconnect side of an RF or microwave build — or if those constraints are coming up in a program that hasn’t had the packaging conversation yet — we are glad to compare notes.