The CHIPS Act committed roughly $52 billion to bring semiconductor manufacturing back to the United States. Nearly all of that went to the front end — wafers, lithography, the part of the supply chain that makes the headlines. The part that turns a working die into a deployable part received a fraction of the spend and most of the policy neglect.
Front-end fabrication is capital-intensive, visible, and politically legible. Building a new fab generates jobs and infrastructure that are easy to photograph and easy to count. The National Advanced Packaging Manufacturing Program — the NAPMP — was the explicit acknowledgment that packaging matters too: roughly $3 billion directed at domestic advanced packaging capability. By comparison, that’s less than six cents of every dollar committed to the broader initiative.
Meanwhile, the volume of domestic packaging capacity hasn’t moved proportionally. Most U.S. assembly, wire bonding, die attach, hermetic seal, and test still routes through overseas OSATs — the same offshore infrastructure it always has.
What “domestic” actually means
The policy framing treats “domestic semiconductor manufacturing” as synonymous with front-end wafer fabrication. That framing misses the back end entirely — and the back end is where a die becomes a part a system integrator can use. Die attach sets the thermal path. Wire bonding determines electrical performance. Hermetic seal decides operating life in the field. These are not secondary operations. They are where the die becomes a finished component.
A chip whose die attach, wire bonding, and hermetic seal happen overseas isn’t a domestic supply chain. It’s a domestic wafer in a foreign package.
The distinction matters most in the programs that depend on supply-chain provenance — defense, aerospace, and regulated industrial applications where trusted-supplier status is a procurement requirement, not a preference.
Where the gaps are
- Package provenance, not just wafer provenance. DoD trusted-supply programs largely measure where the die was fabricated. A die made domestically, then wire-bonded and encapsulated overseas, still has a foreign assembly history.
- Deployment timelines set by packaging, not wafer, lead times. For defense and aerospace programs, the bottleneck is rarely the wafer. It’s finding a qualified domestic packaging shop with capacity, a compliant material stack, and room in the schedule.
- Workforce and process knowledge concentrated offshore. The engineers and technicians who know advanced packaging built careers where the work was. Moving the work requires rebuilding that knowledge base domestically — which takes years, not quarters.
- Qualified domestic suppliers are few and oversubscribed. A handful of U.S. shops do advanced packaging at prototype and low-volume scale. The domestic supply base for production quantities barely exists.
- Equipment and materials ecosystems follow the volume. Packaging-specific tooling, substrate suppliers, and specialty materials all cluster where the assembly work happens. Reshoring the assembly without reshoring the ecosystem leaves gaps at every input.
What closing the gap actually requires
The front-end investment is necessary — the point here is not to argue against domestic fabs. It’s that a policy that funds the front end at $52 billion and the back end at $3 billion is not treating packaging as infrastructure. It is treating it as an afterthought, which is approximately how domestic packaging capability has been managed for the past three decades.
Closing the gap means funding the back-end supply chain at a scale that creates actual alternatives to offshore OSATs — domestic shops that can accept defense programs, trace materials, and build to hermetic standards without requiring a six-month lead time to qualify. It means workforce development that targets assembly and process engineering, not just chip design. And it means procurement policy that counts package provenance the same way it counts wafer provenance.
The question for the next decade of domestic semiconductor policy isn’t whether we can build wafers in the United States. It’s whether we can finish them here.